1. Field of the Invention
This invention relates to a low voltage detection circuit that detects a reduction in a power supply voltage.
2. Description of the Related Art
When a power supply voltage Vdd of a microcomputer is reduced to a voltage lower than a certain reference voltage, circuit operations become unstable to cause a malfunction of the microcomputer. In order to prevent it, the microcomputer incorporates a low voltage detection circuit to detect the reduction in the power supply voltage Vdd so that the microcomputer is automatically reset when the reduction is detected. FIG. 3 shows a circuit structure of a commonly used low voltage detection circuit according to conventional art.
This commonly used low voltage detection circuit is composed of a reference voltage generation circuit 100 that outputs a reference voltage Vref of a constant voltage, a divider circuit 200 that divides the power supply voltage Vdd with divider resistors R10 and R20 and outputs a divided voltage Vb, and a comparator 110 that compares the outputs from the circuits and outputs a result of the comparison.
The reference voltage generation circuit 100 is composed of a constant current transistor M0, that generates a constant current 10, and a load element, that is formed of a resistor R30 and a diode D and is connected in series with the constant current transistor M0. The reference voltage Vref is outputted from a connecting node between the constant current transistor M0 and the load element. The outputs from the reference voltage generation circuit 100 and the divider circuit 200 are inputted to the comparator 110.
The low voltage detection circuit keeps watch on the power supply voltage Vdd, and outputs a low voltage detection signal Cout of a high level from the comparator 110 to reset (halt) the microcomputer so as to prevent malfunctioning of the microcomputer when the divided voltage Vb becomes lower than the reference voltage Vref. The low voltage detection circuit resets the microcomputer to prevent the malfunctioning not only when the power supply voltage Vdd drops during normal operation, but also when the power supply voltage Vdd remains low immediately after power-on.
The technology mentioned above is disclosed in Japanese Patent Application Publication No. H08-097694, for example.
However, there are two problems with the low voltage detection circuit described above. First, there is a problem that the high level of the low voltage detection signal Cout is not outputted when the power supply voltage Vdd and the divided voltage Vb rise abruptly after the power supply is turned on, as a consequence of delay in a rise and not reaching a desired level of the reference voltage Vref generated by the reference voltage generation circuit 100, as shown in FIG. 4A.
Second, even though the high level (=Vdd level) of the low voltage detection signal Cout is once outputted when the power supply voltage Vdd drops gradually during normal operation and becomes Vb<Vref, there is a problem that the high level of the low voltage detection signal Cout is not outputted when the power supply voltage Vdd further drops since the reference voltage Vref can not be maintained at the constant voltage level and abruptly drops to become Vb>Vref, as shown in FIG. 4B.
Therefore, when the low voltage detection circuit described above is integrated into an LSI (Large Scale Integration) such as a microcomputer, there has been a case in which the desired reset operation is not performed and subsequent malfunctioning occurs immediately after the power-on or when the power supply voltage Vdd drops during the normal operation.